No, as a matter of fact I can't stop tinkering with things.
This is a simplification of OISC:3b, which had grown to be a rather unwieldy monster.
Instructions and data go in positive memory space. Coprocessor functions and data go in negative memory space. Negative addresses imply indirect addressing, unless specifically overridden below. Jumping to a negative address Halts and Fails. All words except NEXT are initialized to 0.
3 word instructions, A B C
A B C Function
A B C [C] = [B] - [A] (Indirect is [[|-X|]])
0 B C If [B] <= 0, Jump to C // [|-C|], else Next
A 0 C If [A] <= 0, Relative Jump by #C (-2 is -2), else Next
A B 0 [#B] = [#B] - [#A] (-2 is -2)
A 0 0 Output [A] as character (if negative, Halt & Fail)
0 B 0 Input character to [B]
0 0 C Output [C] as number
0 0 0 Halt and Succeed
Mem Function
-1 IP
-2 NEXT (always IP+3)
-3 RETURN (set to NEXT before Jump)
-4 Register a
-5 Register b
-6 Register c
-7 Mode (immediately acts on a,b,c; then resets to 0)
-8 Flag
-9... Data
Mode Effect
0 NOP
1 c = bitwise NOT b
2 c = b bitwise AND a
3 c = b bitwise OR a
4 c = b bitwise XOR a
5 c = b << a bits
6 c = b >> a bits
7 c = Integer b*a
8 c = b/a (floored integer division)
(Halt & Fail on a=0)
9 c = b%a (Mod) (floored)
(Halt & Fail on a=0)
10 c = Sign of b (+1, 0, -1)
11 c = Floor of b
12 Int c --> Float c
13 Float c --> Int c
14 Int a,b --> Float a,b
15 Float a,b --> Int a,b
16 c = b-a
17 c = b+a
18 c = b*a
19 c = b/a
(Halt & Fail on a=0)
20 c = power a of b
21 c = root a of b
(Halt & Fail on a=0)
22 c = Log base b of a
(Halt & Fail on a=0 or b=0)
23 c = SIN b
24 c = COS b
25 c = TAN b
26 c = CSC b
27 c = SEC b
28 c = COT b
29 c = ASIN b
30 c = ACOS b
31 c = ATAN b
32 c = ACSC b
33 c = ASEC b
34 c = ACOT b
35 a = pi, b = e, c = phi
36 a = 1.0, b = 0.0, c = -1.0
37 c = b Rad --> Deg
38 c = b Deg --> Rad
Extensions to Mode are optional and left to the user.
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